parallel data acquisition中文什么意思

發(fā)音:

用"parallel data acquisition"造句

并行數(shù)據(jù)采集

parallel: adj. 1.平行的；并行的 (to; with); 【 ...
data: n. 1.資料，材料〔此詞系 datum 的復(fù)數(shù)。但 d ...
acquisition: n. 1.取得，獲得；習(xí)得。 2.取得物，獲得物[人]。 ...
acquisition, data: 數(shù)據(jù)采集
data acquisition: 獲得數(shù)據(jù); 數(shù)據(jù)采集; 數(shù)據(jù)的獲取和積累; 數(shù)據(jù)匯集; 數(shù)據(jù)獲得; 數(shù)據(jù)獲取; 數(shù)據(jù)集合; 數(shù)據(jù)收集; 資料獲取; 資料收集; 資料擷取

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例句與用法

This thesis designed an eight - channel parallel data acquisition module based on vxibus , which is a fundamental module to set up a vxi test system
本論文主要設(shè)計(jì)了vxi總線8通道并行隔離a / d模塊,它是組建vxi測(cè)試系統(tǒng)的基本模塊。
The main contributions of the thesis are as following . firstly , the overall design scheme of the eight - channel parallel data acquisition module is determined
論文的主要工作如下: 1 .確定了vxi總線8通道并行隔離a / d模塊的總體設(shè)計(jì)方案。
The multichannel signal conditioners and amplifiers were developed to monitor superelastic wires embedded in structure , and 16 channels parallel data acquisition and processing system was set up . so , the experimental system was established and successfully used as structural health monit
研制完成用于超彈性傳感元件監(jiān)測(cè)的多路微弱信號(hào)調(diào)理與放大儀，構(gòu)建了16路并行數(shù)據(jù)采集與分析摘要博士論文儀，從而完成了結(jié)構(gòu)健康監(jiān)測(cè)的實(shí)驗(yàn)系統(tǒng)，成功用于結(jié)構(gòu)健康監(jiān)測(cè)。
On the bases of the thorough comprehension to the vxibus specification and the multi - channel data acquisition system , and the deeply study to the basic principle and development trend of the vxibus data acquisition technology , the eight - channel parallel data acquisition module is developed
本文在對(duì)vxi總線規(guī)范和多通道并行數(shù)據(jù)采集系統(tǒng)的深入理解,以及對(duì)vxi總線數(shù)據(jù)采集技術(shù)的基本原理和發(fā)展趨勢(shì)作了深入細(xì)致研究的基礎(chǔ)上,完成了vxi總線8通道并行隔離a / d模塊的研制。
The serial a / d transformation and the channel isolation technology are adopted . eight - channel parallel data acquisition and test data time - sharing storage are realized . verilog hdl ( hardware description language ) is adopted to design the vxi register - based interface circuit and control circuit of each channel
以fpga ( fieldprogrammablegatearray )為控制核心,采用串行a / d變換器和通道隔離技術(shù),實(shí)現(xiàn)了8通道并行采集和測(cè)試數(shù)據(jù)分時(shí)存儲(chǔ)功能,利用veriloghdl ( hardwaredescriptionlanguage )設(shè)計(jì)vxi寄存器基接口電路及各通道的控制電路。

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parallel data acquisition中文什么意思

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